1. Field of the Invention
The present invention relates generally to an automatic frequency control (AFC) circuit used to match the frequency of a signal receiver to that of a signal transmitter, and more particularly to sign-cross product frequency control circuits.
2. Discussion of the Background Art
An automatic frequency control (AFC) frequency locked loop is used primarily to match the frequency of a signal receiver to that of a signal transmitter. In coherent demodulation, a phase locked loop (PLL) is typically used to estimate both the frequency and phase error. "Phase" is used to mean the constant modulation phase, which is assumed to be constant over a period of time much longer than the period of the carrier signal. A conventional PLL receiver circuit maintains its synchronization by comparing and adjusting its internal clock signal to received clock signals. In an analog PLL, the internal and received clock signals are supplied to a comparator, which produces a voltage output pulse proportional to the phase differences of the clock signals. Each output pulse is integrated to produce a voltage, which is applied to a voltage-controlled oscillator to produce a phase locked receiver clock signal. Preferably, the phase error is driven to a small value and the voltage-controlled oscillator's frequency is kept equal to the input frequency.
However, PLLs typically have a narrow pull-in range centered about the receiver clock frequency and therefore during acquisition, and in the presence of large frequency errors, the performance of the PLL is very poor. For reliable operation, conventional PLL circuits must employ acquisition-aid circuitry, which unfortunately can represent as much as half of the total circuitry required for clock recovery. This is costly in terms of implementing a circuit on IC chips, where production cost is proportional to chip area.
An AFC can be used to estimate the frequency as an aid to the PLL during acquisition, as discussed by H. Meyr and G. Ascheid in Synchronization in Digital Communications, Wiley: New York, N.Y., 1990. Several types of AFC circuits are available in various implementations of circuit performance and circuit complexity, but high performance cross-product AFC circuits are particularly suitable for telephone communication applications. Cross-product AFC circuits are discussed by F. Natali in "Noise Performance of Cross-Product AFC with Decision Feedback for DPSK signals," IEEE Trans. Communications, vol. 34, pp. 303-307, March 1986; by F. Gardner in "Properties of Frequency Difference Detectors," IEEE Trans. Communications, vol. 33, pp. 131-138, February 1985; and by F. Natali in "AFC Tracking Algorithms," IEEE Trans. Communications, vol. 32, pp. 935-947, August 1986.
One type of AFC circuit used primarily to match the frequency of a signal receiver to that of a signal transmitter in telephone communication applications is a differentiator AFC, where the unknown frequency offset is obtained through differentiation.
A major problem encountered by wireless communication cellular telephone systems is destructive interference in the received radio signal from multi-path radio signals that are reflected from terrestrial obstructions such as buildings and moving vehicles. This causes the received radio signal to appear as the sum of the direct line-of-sight fundamental signal plus the signal reflections with different amounts of attenuation and delay.
The RAKE concept for combining multi-path radio signals was first described and published in 1958, but RAKE receivers are more thoroughly discussed in Digital Communications by Proakis, McGraw-Hill, Inc., 1995. A RAKE receiver consists of a bank of correlators matched to a spreading code used to perform the transmitter's CDMA modulation of the information. With a good choice of spreading codes, each delay path can be independently demodulated by a separate branch circuit or "finger" of the RAKE receiver. After each "finger" demodulates a separate reflection of the transmitted signal, these properly processed signals become carriers of additional information which are constructively combined to increase the overall Signal-to-Noise Ratio (SNR) of the received radio signal.
A RAKE receiver is more suitable than a conventional receiver for receiving and processing reflected multi-path radio signals and thus RAKE receivers are commonly implemented in cellular telephone receivers, especially in US code division multiple access (CDMA) cellular telephone receivers. Multi-path signal reflections can result in different velocities of relative movement between the receiver and each reflective object providing a path for the radio signal reflection, and each reflected radio signal's frequency as seen by the receiver will be either increased or decreased by a Doppler shift. This physical phenomenon is manifested in everyday life by the change in tone of a vehicle's siren as it approaches and then leaves a listener. Therefore, the RAKE receiver should ideally also compensate for the Doppler shift on each reflection of the transmitted signal.
During the acquisition stage, the mismatch between the received signal frequency and the local oscillator typically can be up to 6 KHz. At this stage, only one dedicated AFC detector can be used to correct for the frequency mismatch. During steady state, all AFC detectors in the various RAKE fingers become active and attempt to track the various Doppler shift frequencies due to each multi-path reflection.
Sign-cross-product AFC circuits work well in RAKE receivers used for cellular telephone applications. During steady state, the relative speed between the mobile station and the base station (or several base stations during handoffs) causes different random frequency modulations due to Doppler shifts on the various multi-path signals. The Doppler shifts are positive or negative depending on whether the mobile station is moving toward or away from the base station. Furthermore, objects moving in the mobile station's vicinity cause a time-varying Doppler shift in the multi-path channel.
The application of the sign-cross-product AFC algorithm is illustrated by a mobile station moving at a constant velocity v. The apparent change in frequency, or Doppler shift, is given by ##EQU1##
where .lambda. is the free space wavelength of the radio signal and .theta. is the spatial angle between the direction of motion of the mobile station and the multi-path waves impinging on the antenna. As the mobile station moves towards the propagating multi-path wave, the Doppler shift is positive and the apparent frequency increases. Conversely, as the mobile station moves away from the propagating multi-path wave, the Doppler shift is negative and the apparent frequency decreases. PA1 where .omega. is the frequency of the local oscillator (not shown) and A is a time-varying gain due to the fading characteristics of the channel. Combining the .omega.-.omega. term with the unknown constant carrier phase .theta. into one unknown time variant phase .theta.(t), equation (2) can be rewritten as EQU y(t)=A sin[.omega.t+.theta.(t)]+n(t) (3)
After acquisition, the received signal is filtered and mixed to base-band (zero IF) by demodulating the carrier frequency from the received waves. This process, however, does not remove the Doppler frequency shift (or offset) from the received signal. The presence of a Doppler frequency offset in the signal path can significantly degrade the performance of the radio receiver. An algorithm such as the sign-cross-product AFC algorithm can be employed to remove the unwanted frequency offset.
There are several levels of complexity in differentiator AFC circuits for RAKE receiver applications. In a balanced discrete quadricorrelator AFC loop, henceforth referred to as an AFC loop, the unknown frequency offset is obtained through differentiation. Referring to FIG. 1, the optimal phase estimator 100 structure conventionally comprises multipliers 102 and 104, integrators 106 and 108 and an arctangent function 110. The received signal y(t) can be expressed as EQU y(t)=A sin[.omega.t+(.omega.-.omega.)t+.theta.]+n(t) (2)
In the noise free case, the outputs of the integrators (or low-pass filters) 106 and 108 are given as EQU y.sub.c (t)=A cos .theta.(t) (4)
and EQU y.sub.s (t)=A sin .theta.(t) (5)
The integrators 106 and 108 used in the optimal phase estimator structure 100 can be implemented in circuits requiring relatively few transistors compared to the multipliers 102 and 104. The arctangent function can also be implemented in circuits requiring relatively few transistors compared to the multipliers 102 and 104. The multipliers 102 and 104, which are typically floating point multiplier circuits, require a very large number of transistors and a corresponding large area of a chip if implemented in an integrated circuit.
FIG. 2 depicts a prior art differentiator AFC circuit 200 constructed of multipliers 202 and 204, analog-to-digital converters 206 and 208, integrators 210 and 212, down-sampler circuits 214 and 216, delay circuits 218 and 220, multipliers 222 and 224, adder 226, amplifier 228, loop filter 230, track-and-hold sampler 232, digital-to-analog converter 234 and voltage-controlled-oscillator (VCO) 236.
The received signal y(t) is first input to the frequency discriminator 240. The multipliers 202 and 204 function as correlation detectors. The received signal is cross-correlated with sin(.omega.t) and cos(.omega.t) to give the respective outputs sin[(.omega.-.omega.)t] and cos[(.omega.-.omega.)t] for the noise free case. In the presence of noise, however, the sine and cosine terms are contaminated with an additive broadband noise term, which at -5 dB tends to dominate the original sinusoidal signals. The desired signals (sinusoids) are very close to the base-band when compared to the overall bandwidth of the noise. To smooth out the noise and improve the SNR, the correlated signals are then processed through integrators 210 and 212 and down-sampler circuits 214 and 216. The resulting signals are thus decimated to a lower rate, and only the mean noise-attenuated sample is retained. The signals y.sub.c and y.sub.s are then passed through a differentiator circuit formed of two delays 218 and 220, two multipliers 222 and 224, and an adder 226, resulting in an estimate of the frequency error f.sub.e. The frequency error signal f.sub.e is then passed through amplifier 228, loop filter 230, track-and-hold sampler 232 and digital-to-analog converter 234, to produce an output which is an estimate of the frequency offset that is then fed to the voltage-controlled-oscillator (VCO) 236. The VCO 236 output is fed back as an input either to the frequency discriminator 240 or to an intermediate frequency (IF) oscillator (not shown).
Prior art sign cross-product automatic frequency control circuits use at least two floating point multipliers 222 and 224 to implement a frequency discriminator. Floating point multiplier circuits have several disadvantages. Because of their complexity, floating point multiplier circuits require thousands of transistors, and consequentially require considerable integrated circuit (IC) chip area for implementation. The large IC area required for the multiplier increases power supply (battery) drain and heat dissipation. Also, floating point multiplications require numerous clock cycles and are generally slow to execute.
For these and other reasons, a frequency discriminator is needed that avoids use of multipliers in implementing the cross-product automatic frequency control loop.